1. Field of Invention
This invention relates to an MCM (Multi-chips Module) package. More particularly, the present invention is related to an MCM package with bridge connection.
2. Related Art
Integrated circuit (chip) packaging technology is becoming a limiting factor for the development in packaged integrated circuits of higher performance. Semiconductor package designers are struggling to keep pace with the increase in pin count, size limitations, low profile, and other evolving requirements for packaging and mounting integrated circuits.
Originally, the electrical connection between the chips comprises wire bonding connection and flip chip connection. In wire bonding connection, a wire bonder is disposed above the chip and then the tip of the conductive wire is melting to shape into a ball. Next, the conductive wire is bonded onto the bonding pad of the chip. Then, the wire bonder is moved and disposed above another bonding pad of the chip, and then another conductive wire will be bonded onto the corresponding bonding pad of the chip in the same way as mentioned above. In flip chip bonding, a plurality of bumps are formed on the bonding pads of the chip, and then flipped and bonded to another chip by a reflow process.
Next, a well-known wire bonding method utilized in a conventional MCM assembly package will be disclosed as below. As shown in FIG. 1, it illustrates the cross-sectional view of the conventional MCM package with wire bonding connection. The MCM package comprises a carrier 10, a first chip 12, a second chip 14, a plurality of conductive wires 160, 162 and 164, an encapsulation 18 and a plurality of solder balls 107. The carrier 10, for example a substrate and a lead frame, has an upper surface 102 and an opposite lower surface 104, a plurality of contacts 106, a first die paddle 105 and a second die paddle 109. The contacts 106, the first die paddle 105 and the second die paddle 109 are formed on the upper surface 102, and the first die paddle 105 and the second paddle 109 are encompassed with the contacts 106. As mentioned above, the first chip 12 has a first active surface 122, a first back surface 124 and a plurality of first bonding pads 126 formed on the first active surface 122. It is should be noted that the first chip 12 is mounted onto the first die paddle 105 of the carrier 10 via an adhesive 105 and electrically connected to the carrier 10 via the conductive wire 160. Therein one end of the conductive wire 160 is bonded to the bonding pad 126 and the other end of the conductive wire 160 is bonded onto the contact 106 of the carrier 10.
Similarly, the second chip 14 is mounted onto the second die paddle 109 of the carrier 10 via an adhesive (not shown) and electrically connected to the carrier 10 via the conductive wire 162. Therein one end of the conductive wire 162 is bonded to the bonding pad 146 and the other end of the conductive wire 162 is bonded onto the contact 108 of the carrier 10. In addition, the first chip 12 is electrically connected to the second chip 14 through the conductive wire 164. Furthermore, an encapsulation 18 encapsulates the first chip 12, the second chip 14 and the upper surface 102 of the carrier 10 and said conductive wires 160, 162 and 164.
In the above-mentioned MCM package, the first chip 12 is electrically connected to the second chip 14 through the conductive wire 164. However, the cross-sectional area of the conductive wire 164 is small and the length of the conductive wire 164 is long so as to cause the characterization impedance to be mismatched and to cause the signal to be attenuated. Besides, when the high-frequency circuits are performed, the parasitics of the inductance and the capacitor will be induced to cause the signal to be reflected. In addition, the cross-sectional area of the conductive wire for connecting the first chip is so small that the grounding connection will become worse.
Therefore, providing another MCM package to solve the mentioned-above disadvantages is the most important task in this invention.